Method for etching a hardmask layer for an interconnection structure for semiconductor applications
OwnerSumit AGARWAL, Chiu-pien KUO +2inventors
InventorsSumit AGARWAL, Chiu-pien KUO, Shawn HSIEH, Cary HUNG
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OwnerSumit AGARWAL, Chiu-pien KUO +2inventors
InventorsSumit AGARWAL, Chiu-pien KUO, Shawn HSIEH, Cary HUNG
Estimating the term…
Embodiments of the present disclosure provide methods for patterning a hardmask layer disposed on a metal layer, such as a copper layer, to form an interconnection structure in semiconductor devices. In one embodiment, a method of patterning a hardmask layer on a metal layer disposed on a substrate includes supplying a first etching gas mixture comprising a carbon-fluorine containing gas and a chlorine containing gas into a processing chamber to etch a portion of a hardmask layer disposed on a metal layer formed on a substrate, supplying a second etching gas mixture comprising a hydrocarbon gas into the processing chamber to clean the substrate, and supplying a third etching gas mixture comprising a carbon-fluorine containing gas to remove a remaining portion of the hardmask layer until a surface of the metal layer is exposed.
A method of patterning a hardmask layer disposed on a metal layer formed on a substrate, comprising:
A method of patterning a hardmask layer disposed on a metal layer formed on a substrate, comprising:
A method of patterning a hardmask layer disposed on a metal layer formed on a substrate, comprising:
Dependencies are inferred from the claim text.