Single Ended Word Line and Bit Line Time Constant Measurement

In a non-volatile memory array formed of a plurality of memory cells formed along a plurality of access lines that, during memory operations, are driven from a near end thereof, a method of determining a time constant for charging the far end of the access lines, the method comprising:

• driving the near end of a selected access line with a first voltage from a voltage supply;
• while so driving the near end of a selected access line, determining a first number of clock cycles required for the amount of current supplied by the voltage supply in driving the near end of a selected access line to decrease from a first level to a second level;
• and
• based upon the first number of clock cycles required, estimating the time constant for charging the far end of the selected access line.

In a non-volatile memory array formed of a plurality of memory cells formed along a plurality of access lines that, during memory operations, are driven from a near end thereof, a method of determining a time constant for charging the far end of the access lines, the method comprising:

• charging the far end of a selected access line to a first voltage;
• while discharging the far end of the selected access line to the near end thereof, determining the number of clock cycles required for the current discharging the far end of the selected access line to decrease from a first level to a second level;
• and
• based upon the number of clock cycles required, estimating the time constant for charging the far end of the selected access line.