Semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorsMasanobu SHIRAKAWA, Takuya FUTATSUYAMA, Koji HOSONO
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Abstract
According to one embodiment, a semiconductor memory device includes: a first memory cell; a second memory cell; a first word line coupled to the first memory cell; and a second word line coupled to the second memory cell. When data is read from the first memory cell, a first voltage and a second voltage is applied to the first word line. A voltage of the second word line changes a first number of times while the first voltage is applied to the first word line, and the voltage changes a second number of times different from the first number of times while the second voltage is applied to the first word line.
Claims20
A semiconductor memory device comprising:
- a first memory cell;
- a second memory cell adjacent to the first memory cell;
- a first word line coupled to the first memory cell;
- and
- a second word line coupled to the second memory cell,
- wherein when data is read from the first memory cell,
- a first voltage and a second voltage different from the first voltage are applied to the first word line, and
- a voltage applied to the second word line changes a first number of times while the first voltage is applied to the first word line, and the voltage applied to the second word line changes a second number of times different from the first number of times while the second voltage is applied to the first word line.
A semiconductor memory device comprising:
- a first memory cell;
- a second memory cell coupled to the first memory cell;
- a first word line coupled to the first memory cell;
- and
- a second word line coupled to the second memory cell,
- wherein in a program-verification operation of the first memory cell,
- a voltage applied to the first word line changes a first number of times, and a voltage applied to the second word line changes a second number of times.
Dependencies are inferred from the claim text.