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US 2016/0078946 A1Published application
Memory system and operation method thereof
AssigneeSK hynix Inc.
InventorEu-Joon BYUN
Life of this patent
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Abstract
A memory system includes a memory device having a plurality of memory blocks, each including a plurality of pages, each page including a plurality of memory cells, wherein data provided from a host device is written on the plurality of pages and the plurality of memory cells coupled to a plurality of word lines; and a controller suitable for setting word line zones by grouping the plurality of word lines by a predetermined number, and performing a bad management for the memory blocks in each of the word line zones.
Claims20
A memory system comprising:
- a memory device including a plurality of memory blocks, wherein each of the plurality of memory blocks includes a plurality of pages, wherein each of the plurality of pages includes a plurality of memory cells, and wherein the plurality of memory cells are coupled to a plurality of word lines;
- and
- a controller suitable for grouping the plurality of word lines to N number of word line zones, where N is integer equal to or greater than 2,
- wherein each of the word line zones includes M number of memory cells, where M is integer equal to or greater than 2, and
- wherein the controller performs a bad block management operation word line zone by word line zone.
2 more elements
An operation method of a memory system, comprising:
- providing a first memory block including a plurality of word lines,
- grouping the plurality of word lines into N number of word line zones, where N is an integer equal to or larger than 2, wherein a plurality of memory cells are coupled to each of the plurality of word lines;
- checking if a first word line zone, which is selected from the N number of word line zones, is a bad word line zone;
- and
- performing bad block management operation for the bad word line zone.
2 more elements
Dependencies are inferred from the claim text.