Semiconductor memory device and method for driving the same

A semiconductor memory device comprising:

• a plurality of semiconductor members arranged along a first direction and a second direction, the second direction crossing the first direction, and the plurality of semiconductor members extending in a third direction crossing a plane including the first direction and the second direction;
• a plurality of electrode members extending in a direction crossing the third direction;
• and
• a charge accumulation member provided between the semiconductor member and the electrode member, and the charge accumulation member being capable of accumulating charge,
• a memory cell formed at each crossing portion of the semiconductor member and the electrode member via the charge accumulation member belonging to one of a first group and a second group, and
• the semiconductor memory device being configured to perform a first step and a second step when reducing the charge accumulated in the charge accumulation member,
• in the first step, a first voltage being applied both between the semiconductor member and the electrode member constituting the memory cell belonging to the first group and between the semiconductor member and the electrode member constituting the memory cell belonging to the second group, the first voltage being such that potential of the electrode member is lower than potential of the semiconductor member, and
• in the second step, a second voltage being applied between the semiconductor member and the electrode member constituting the memory cell belonging to the second group, the second voltage being such that potential of the electrode member is lower than potential of the semiconductor member.

A method for driving a semiconductor memory device, the semiconductor memory device including a plurality of semiconductor members arranged along a first direction and a second direction crossing the first direction and extending in a third direction crossing a plane including the first direction and the second direction, a plurality of electrode members extending in a direction crossing the third direction, and a charge accumulation member provided between the semiconductor member and the electrode member and being capable of accumulating charge, a memory cell being formed at each crossing portion of the semiconductor member and the electrode member via the charge accumulation member, the method comprising:

• reducing the charge accumulated in the charge accumulation member, including:
• a first step configured to apply a first voltage both between the semiconductor member and the electrode member constituting the memory cell belonging to the first group and between the semiconductor member and the electrode member constituting the memory cell belonging to the second group, the first voltage being such that potential of the electrode member is lower than potential of the semiconductor member;
• and
• a second step configured to apply a second voltage between the semiconductor member and the electrode member constituting the memory cell belonging to the second group, the second voltage being such that potential of the electrode member is lower than potential of the semiconductor member.