Operating characteristics of a semiconductor device
AssigneeSK hynix Inc.
InventorsYeonghun LEE, Dong Hwan LEE
Life of this patent
Estimating the term…
Abstract
Provided is a semiconductor device. The semiconductor device includes memory blocks including select transistors electrically coupled to local select lines and memory cells electrically coupled to local word lines, a first connection circuit configured to electrically couple the local select lines of a selected memory block and global select lines according to a block select signal, and formed in a first well region of a substrate, and a second connection circuit configured to electrically couple the local word lines of the selected memory block and global word lines according to the block selection signal, and formed in a second well region of the substrate.
Claims20
A semiconductor device, comprising:
- memory blocks including select transistors electrically coupled to local select lines and memory cells electrically coupled to local word lines;
- a first connection circuit configured to electrically couple the local select lines of a selected memory block and global select lines according to a block select signal, and formed in a first well region of a substrate;
- and
- a second connection circuit configured to electrically couple the local word lines of the selected memory block and global word lines according to the block selection signal, and formed in a second well region of the substrate.
A semiconductor device, comprising:
- a first connection circuit formed in a first well region of a substrate to electrically couple local select lines of a selected memory block and global select lines;
- and
- a second connection circuit formed in a second well region of the substrate to electrically couple local word lines of the selected memory block and global word lines,
- wherein the first well region is isolated from the second well region.
A semiconductor device, comprising:
- a first connection circuit configured with first transistors to electrically couple select lines of a memory block to global select lines according to a block selection signal in a first well region;
- and
- a second connection circuit configured with second transistors to electrically couple local word lines of the memory block to global word lines according to the block selection signal in a second well region.
Dependencies are inferred from the claim text.