Method and apparatus for providing multi-page read and write using sram and nonvolatile memory devices
AssigneeNEO Semiconductor, Inc.
InventorFu-Chang Hsu
Life of this patent
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AssigneeNEO Semiconductor, Inc.
InventorFu-Chang Hsu
Estimating the term…
A memory device includes a static random-access memory (“SRAM”) circuit and a first nonvolatile memory (“NVM”) string, a second NVM string, a first and a second drain select gates (“DSGs”). The SRAM circuit is able to temporarily store information in response to bit line (“BL”) information which is coupled to at the input terminal of the SRAM circuit. The first NVM string having at least one nonvolatile memory cell is coupled to the output terminal of the SRAM. The first DSG is operable to control the timing for storing information at the output terminal of the SRAM to the first nonvolatile memory. The second NVM string having at least one nonvolatile memory cell is coupled to the output terminal of the SRAM. The second DSG controls the timing for storing information at the output terminal of the SRAM to the second nonvolatile memory string.
A memory device able to store information, comprising:
A method for programming nonvolatile memory cell in a memory device, comprising:
A memory device operable to store information, comprising:
A method for storing information in a memory device, comprising:
Dependencies are inferred from the claim text.