Fast programming of magnetic random access memory (mram)

A circuit comprising:

• a magnetoresistive tunnel junction (MTJ);
• an access transistor coupled to the MTJ, the access transistor having a gate, a source, and a drain;
• a bit line (BL) coupled an end of the MTJ and the drain of the access transistor coupled to an opposite end of the MTJ;
• a word line (WL) coupled to the gate of the access transistor, the circuit is operable to:
• boot the voltage of WL to a voltage substantially of Vddx volts, Vddx being substantially the sum of Vdd voltage and Vx volts, the Vx volts being greater than 0 volts and less than Vdd volts,
• set the voltage of the BL o substantially the Vdd volts,
• raise the SL to be substantially at Vx volts;
• and
• program the MTJ to a parallel state.

A method of programming a magnetoresistive tunnel junction (MTJ) coupled to a transistor, the transistor having a gate, a source, and a drain, the method comprising:

• booting the voltage of a word line (WL) to a voltage substantially of Vddx volts, Vddx volts being substantially the sum of Vdd volts and Vx voltage, the Vx volts being greater than 0 volts and less than Vdd volts;
• setting the voltage of a bit line (BL) to substantially zero volts;
• setting a source line (SL) coupled to the source of the transistor to substantially the Vdd volts, the BL coupled to an end of the MTJ, the drain of the access transistor coupled to an opposite end of the MTJ, the voltage of the BL and the voltage of the WL causing the opposite end of the MTJ to be substantially at the Vx volts;
• and
• programming the MTJ to an anti-parallel state.

A circuit comprising:

• a transistor having a gate, a source gate, and a drain gate, the gate of the transistor coupled to a word line (WL);
• a magnetoresistive tunnel junction (MTJ) coupled to a bit line (BL), the MTJ configured to switch logic states from ‘1’ to ‘0’ or ‘0’ to ‘1’ based on the magnetization of the MTJ, the MTJ, at one end, being coupled to the drain of the transistor and to a source line (SL) at an opposite end, the BL being coupled to the drain of the transistor and at a voltage of substantially Vdd,
• the circuit operable to:
• cause the voltage of the WL to boot to a voltage substantially Vddx volts, Vddx being substantially the sum of Vdd and Vx, Vx being a voltage that is greater than 0 volts and less than Vdd, the voltage of the second gate of the access transistor being greater than 0 volts,
• wherein current through the MTJ is increased to cause the MTJ to be programmed.