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US 2016/0078586 A1Published application
Hierarchical Index Bits for Multi-Sampling Anti-Aliasing
AssigneeIntel Corporation
InventorTomas G. Akenine-Moller
Life of this patent
Estimating the term…
Abstract
In accordance with some embodiments, a control surface stores the index bits in a tile using multi-sampling anti-aliasing. By determining whether all the samples in a tile point to plane 0, one can use only two bits in a control surface for the tile to indicate that all the samples on the tile point to plane 0. Otherwise more than two bits may be stored in the control surface to indicate planes pointed to by the samples of the tile.
Claims30
A method comprising:
- determining in the course of multi-sampling anti-aliasing whether all samples in a tile point to plane 0;
- and
- if so, storing an indication in a control surface for the tile that all samples in the tile point to plane 0.
One or more non-transitory computer readable media storing instructions executed by a processor to perform a sequence comprising:
- determining in the course of multi-sampling anti-aliasing whether all samples in a tile point to plane 0;
- and
- if so, storing an indication in a control surface for the tile that all samples in the tile point to plane 0.
An apparatus comprising:
- a processor to determine in the course of multi-sampling anti-aliasing whether all samples in a tile point to plane 0, and if so, store an indication in a control surface for the tile that all samples in the tile point to plane 0;
- and
- a storage coupled to said processor.
Dependencies are inferred from the claim text.