Detection of a security event
AssigneeHewlett-Packard Development Company, L.P.
InventorsChris I. Dalton, Boris Balacheff, Perry V. Lea
Life of this patent
Estimating the term…
Abstract
The present disclosure relates to an integrated circuit. The integrated circuit includes a memory controller. The integrated circuit includes a first memory coupled to the memory controller. The integrated circuit includes a processor core coupled to the memory controller. The integrated circuit includes a secure core that includes a second memory. The secure core is configured to inspect the first memory and detect a security event.
Claims15
An integrated circuit, comprising:
- a memory controller;
- a first memory coupled to the memory controller a processor core coupled to the memory controller;
- and
- a secure core comprising a second memory with a discrete memory space, the secure core to inspect the first memory and detect a security event.
A method, comprising:
- operating a security kernel in a secured memory space;
- inspecting a memory coupled to a processor core;
- detecting a security event in the memory;
- and
- remedying the detected security event.
An electronic device, comprising an integrated circuit, the integrated circuit comprising:
- a memory controller;
- a first memory coupled to the memory controller
- a processor core coupled to the memory controller;
- and
- a secure core comprising a second memory with a discrete memory space, the secure core to inspect the first memory and detect a security event.
Dependencies are inferred from the claim text.