Data pattern detecting device, semiconductor device including the same, and operating method thereof

A semiconductor device comprising:

• a memory cell array;
• and
• a control device suitable for controlling the memory cell array for input and output of data requested from a host,
• wherein the control device comprises:
• a pattern detecting device suitable for determining whether the data requested from the host has a specific data pattern;
• an address mapping table suitable for storing a logical address and a physical address corresponding to the logical address for the data of the memory cell array;
• and
• a control unit suitable for allocating a specific physical address for the data, which is to be written into the memory cell array in response to a request from the host and has the specific data pattern.

A method for operating a semiconductor device, comprising:

• compressing data requested to be written;
• determining whether the data requested to be written has a specific data pattern;
• and
• allocating a specific physical address for the data requested to be written and having the specific data pattern,
• wherein the determining comprises:
• comparing lengths of compressed input data and compressed reference data;
• and
• comparing the compressed input data and the compressed reference data, and
• wherein the compressed input data is obtained by compressing the data requested to be written, and
• wherein the compressed reference data is obtained by compressing the specific data pattern.