Mechanism for managing access to at least one shared integrated peripheral of a processing unit and a method of operating thereof

A mechanism for managing access to at least one shared integrated peripheral of a processing unit, wherein the mechanism is operative in one of at least two operational states comprising an available state and a locked state, wherein the mechanism comprises:

• at least one context register for storing context information;
• a bus interface for receiving a request communicated via a bus to the integrated peripheral of the processing device,
• a managing unit operably coupled to the bus interface, and
• a filtering unit operably inter-coupled between the bus interface and one or more circuitries of the integrated peripheral and further operably coupled to the managing unit, wherein the filtering unit is arranged to
• obtain information relating to a context of the received request;
• wherein the managing unit is arranged to
• if the operative state of the mechanism is in the available state:
• load the context register with the obtained context information, and
• grant access in response to the received request;
• and
• if the operative state of the mechanism is in the locked state:
• detect whether the obtained context information matches with the context information stored in the context register;
• and
• if the obtained and stored context information match, grant access in response to the received request.