Magnetic random access memory
AssigneeKabushiki Kaisha Toshiba
InventorKatsuhiko HOYA
Life of this patent
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Abstract
A magnetic random access memory includes memory cells, a read circuit, (ECC) circuit, an address register, a flag register, a flag check circuit, and a write back circuit. The memory cells each include a magnetoresistive element. The address register stores the address at which the error has been detected by the ECC circuit. The data register stores corrected data in which the error has been corrected by the ECC circuit. The flag register sets an error flag in association with the address at which the error has been detected by the ECC circuit. The flag check circuit checks whether the error flag is set in the flag register. The write back circuit writes back the data to the memory cell designated by the address corresponding to the error flag.
Claims3
A magnetic random access memory comprising:
- a memory cell array in which memory cells each including a magnetoresistive element are arranged;
- a read circuit configured to read data from a memory cell designated by an address out of memory cells;
- an error checking and correction (ECC) circuit configured to check an error in the data read by the read circuit and correct the error;
- a data register configured to store corrected data in which the error has been corrected by the ECC circuit;
- a flag register configured to set an error flag in association with the address at which the error has been detected by the ECC circuit;
- and
- a write back circuit configured to write back the corrected data to the memory cell.
Dependencies are inferred from the claim text.