Solid state storage device and error correction method thereof
AssigneeLite-On Technology Corporation
InventorsShih-Jia Zeng, Sheng-Han Wu, Jen-Chien Fu, Yu-Shan Wu
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AssigneeLite-On Technology Corporation
InventorsShih-Jia Zeng, Sheng-Han Wu, Jen-Chien Fu, Yu-Shan Wu
Estimating the term…
An error correction method for a solid state storage device is provided. A controller of the solid state storage device issues plural slicing voltages to a flash memory. The flash memory issues a soft data to a soft decoder of the controller according to the plural slicing voltages. Firstly, the soft decoder receives the soft data, and performs an error correction process of the soft data according to a predetermined log-likelihood ratio (LLR) parameter set. If the error correction process of the soft data is not successfully completed according to the predetermined LLR parameter set, one LLR parameter set is selected from plural parameter sets of a LLR table and the error correction process of the soft data is performed according to the selected LLR parameter set.
A solid state storage device in communication with a host, the solid state storage device comprising:
An error correction method for a solid state storage device, a controller of the solid state storage device issuing plural slicing voltages to a flash memory, the flash memory issuing a soft data to a soft decoder of the controller according to the plural slicing voltages, the error correction method comprising steps of:
Dependencies are inferred from the claim text.