Determining bias information for offsetting operating variations in memory cells
AssigneeHGST Technologies Santa Ana, Inc.
InventorsAldo G. COMETTI, Pablo Alejandro ZIPEROVICH
Life of this patent
Estimating the term…
Abstract
Disclosed is an apparatus and method for determining memory cell bias information for use in memory operations. One or more memory die are selected from a group of memory die, and one or more memory blocks selected from the selected one or more memory die. A group of cells within the selected memory blocks are programmed and cycled. Bias values are generated based on comparing one or more program levels associated with respective wordlines with predetermined programming levels. The bias values are stored lookup table that is configured to be accessible at runtime by a memory controller for retrieval of the bias value during a memory operation.
Claims20
A method for providing memory cell bias information for offsetting operation variations in memory cells, comprising:
- cycling a plurality of memory cells for one or more cycle intervals;
- determining, for each cycle interval, a shift in program levels for the memory cells at one or more memory addresses resulting from the cycling;
- determining, for each cycle interval, one or more bias values that when applied to a memory operation causes the memory operation to restore the program levels for memory cells at the one or more memory addresses to within a predetermined tolerance of one or more predetermined values for the cycle interval and the one or more memory addresses, the one or more predetermined values based on predetermined programming data;
- associating, for each cycle interval, the one or more bias values with the one or more memory addresses;
- and
- storing the determined bias values and associated memory addresses in a parameter storage location associated with a memory controller of a solid state storage device, the parameter storage location configured to be accessible during storage operations by the memory controller for retrieval of the stored bias values based on a current operation memory address and a current cycle interval.
A non-transitory machine readable medium having instructions stored thereon that, when executed by a computer-enabled machine, case the machine to perform a method comprising:
- cycling a plurality of memory cells at one or more memory addresses for one or more cycle intervals;
- determining, for each cycle interval, a shift in program levels for the memory cells resulting from the cycling;
- determining, for each cycle interval, one or more bias values that when applied to a memory operation causes the memory operation to restore the program levels for memory cells at the one or more memory addresses to within a predetermined tolerance of one or more predetermined values for the cycle interval and the one or more memory addresses, the one or more predetermined values based on predetermined programming data;
- associating, for each cycle interval, the one or more bias values with the one or more memory addresses;
- and
- storing the determined bias values and corresponding memory address associations in a parameter storage location associated with a memory controller of a solid state storage device, the parameter storage location configured to be accessible during storage operations by the memory controller for retrieval of the stored bias values based on a current operation memory address and a current cycle interval.
Dependencies are inferred from the claim text.