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US 2016/0003904 A1Published application
Integrated circuit testing
AssigneeRambus Inc.
InventorAdrian E. Ong
Life of this patent
Estimating the term…
Abstract
Systems and methods of testing integrated circuits are disclosed. A system may include a data compression component to compress data received from an integrated circuit under test at a first clock frequency, to generate compressed data. The system may also include a data output component, operatively coupled to the data compression component, to convey the compressed data to automated testing equipment at a second clock frequency.
Claims20
A system comprising:
- a data compression component to compress data received from an integrated circuit under test at a first clock frequency, to generate compressed data;
- and
- a data output component, operatively coupled to the data compression component, to convey the compressed data to automated testing equipment at a second clock frequency.
A system comprising:
- a data compression component to compress data received from an integrated circuit to generate compressed data, the compression being responsive to an address within the integrated circuit from which the data was received;
- and
- a data output component, operatively coupled with the data compression component, to convey the compressed data to automated testing equipment.
A method comprising:
- compressing received data responsive to expected data, to generate compressed data;
- and
- providing the compressed data to automated testing equipment.
Dependencies are inferred from the claim text.