Method of forming semiconductor device including protrusion type isolation layer

A method of forming a semiconductor device, the method comprising:

• providing a semiconductor layer;
• forming a convex portion and a concave portion surrounding the convex portion in the semiconductor layer;
• forming a protrusion type isolation layer to fill the concave portion so that an uppermost surface of the isolation layer is at a level higher than an uppermost surface of the convex portion;
• forming at least one trench traversing the convex portion and having a line shape;
• forming a gate structure in the at least one trench;
• forming a contact plug by filling a conductive material in a contact hole;
• and
• forming a bit line electrically connected to the contact plug and crossing a gate line, wherein the contact plug is on and electrically connected to a source/drain region of the convex portion and is surrounded by the isolation layer.

A method of forming a semiconductor device, the method comprising:

• providing a semiconductor layer;
• forming a convex portion and a concave portion surrounding the convex portion in the semiconductor layer;
• forming a protrusion type isolation layer filling the concave portion and extending upward so that an uppermost surface of the isolation layer is at a level higher than an uppermost surface of the convex portion;
• forming at least one trench that traverses the convex portion and has a line shape;
• forming at least one gate structure in the at least one trench;
• and
• forming a contact plug on and electrically connected to a source/drain region of the convex portion, the contact plug being surrounded by the isolation layer.

A method of forming a semiconductor device, the method comprising:

• providing a semiconductor layer;
• forming a semiconductor layer including an active region;
• forming an isolation layer surrounding the active region;
• forming at least two gate structures crossing the active region, wherein an uppermost surface of each of the gate structures being at a level higher than an uppermost surface of the active region and each of the gate structures including a gate conductive layer buried in the semiconductor layer;
• forming a contact plug disposed on the active region between the gate structures;
• and
• forming a bit line electrically connected to the contact plug.