# US 2015/0324253 A1 · Rank-modulation rewriting codes for flash memories

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- Number: US 2015/0324253 A1
- Document ID: US20150324253A1
- Status: Published application
- Kind: A1
- Application number: 14/728,749
- Filed: 2015-06-02
- Published: 2015-11-12
- Earliest claimed: 2012-03-08
- Assignees: California Institute of Technology; The Texas A&M University System
- Applicants: California Institute of Technology; Texas A&M University System
- Inventors: Anxiao Jiang; Eyal En Gad; Jehoshua Bruck; Eitan Yaakobi
- Web page: https://patentgrep.com/patent/US20150324253A1

## CPC

- G06F 11/1072: {in multilevel memories}
- G06F 11/1016: {Error in accessing a memory location, i.e. addressing error}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G11C 7/1006: {Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor}
- G11C 11/5628: {Programming or writing circuits; Data input circuits}
- G11C 16/10: Programming or data input circuits
- G11C 16/349: {Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles}
- G11C 29/52: Protection of memory contents; Detection of errors in memory contents
- H03M 13/13: Linear codes
- G11C 2211/5649: Multilevel memory with plate line or layer, e.g. in order to lower programming voltages
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

Rank modulation has been recently proposed as a scheme for storing information in flash memories. Three improved aspects are disclosed. In one aspect the minimum push-up scheme, for storing data in flash memories is provided. It aims at minimizing the cost of changing the state of the memory. In another aspect, multi-cells, used for storing data in flash memories is provided. Each transistor is replaced with a multi-cell of mm transistors connected in parallel. In yet another aspect, multi-permutations, are provided. The paradigm of representing information with permutations is generalized to the case where the number of cells in each level is a constant greater than one. In yet another aspect, rank-modulation rewriting schemes which take advantage of polar codes, are provided for use with flash memory.

## Claims

### Claim 1

A method of operating a memory device, the method comprising:
receiving a new data set for a rank of a plurality of ranks to be stored in the memory device wherein the memory device comprises a plurality of cells;
reading a current state of candidate cells within the plurality of cells wherein candidate cells are used to store the new data set;
creating a binary representation of the plurality of cells used to store the new data set;
using a WOM code to combine the binary representation with the new data set to create a binary WOM vector;
modifying the binary WOM vector to equal quantities of 1's and 0's within the candidate cells creating a new data vector;
writing the new data vector to the candidate cells.

### Claim 2 (depends on 1)

A method as in claim 1, wherein the WOM is a Polar WOM.

### Claim 3 (depends on 1)

A method as in claim 1, wherein a cost of writing is defined as a maximum level of the plurality of cells after writing the new data vector minus a maximum level of the candidate cells before writing the new data vector.

### Claim 4 (depends on 3)

A method as in claim 3, wherein the cost=1.

### Claim 5 (depends on 1)

A method as in claim 1, wherein the method further comprises:
reading the new data vector from the candidate cells;
modifying the new data vector to recreate the binary WOM vector;
using a WOM code on the binary WOM vector to separate the binary representation from the data set.

### Claim 6 (depends on 5)

A method as in claim 5, wherein the WOM is a Polar WOM.

### Claim 7

A computer method of operating a memory device, the method comprising:
receiving a new data set m for a rank to store in the memory device wherein the memory device comprises a plurality of cells;
reading a current state of the plurality of cells within the plurality of cells are arranged according to a rank modulation scheme and the plurality of cells are used to store the new data set;
determine a new multi-permutation to be written to the plurality of cells representing the received data set m determined in accordance with a predetermined cost;
write the new multi-permutation on to memory.

### Claim 8

A computer method of operating a memory device, the method comprising:
receiving a data value composing a plurality of data sets wherein each data set is a set of values representing a rank in a plurality of ranks and repeating for the data sets in the data value, operations comprising:
receiving a new data set for a rank of the plurality of ranks to be stored in the memory device wherein the memory device comprises a plurality of cells;
reading a current state of candidate cells within the plurality of cells wherein candidate cells are used to store the new data set;
creating a binary representation, of the plurality of cells used to store the new data set;
using a WOM code to combine the binary representation with the new data set to create a binary WOM vector;
modifying the binary WOM vector to equal quantities of 1's and 0's within the candidate cells creating a new data vector;
writing the new data vector to the candidate cells.

### Claim 9 (depends on 8)

A method as in claim 8, wherein the WOM is a Polar WOM.

### Claim 10

A computer method of operating a memory device, the method comprising:
reading a plurality of cells and determining a multi-permutation stored in the plurality of cells;
identifying a group of cells in the plurality of cells, contained within each rank of a plurality of ranks;
for each rank, performing the steps of:
reading a new data vector from the rank;
modifying the new data vector to recreate a binary WOM vector;
using a WOM code on the binary WOM vector to separate a binary representation from a data set.

### Claim 11 (depends on 10)

A method as in claim 10, wherein the WOM is a polar WOM.

### Claim 12

A memory controller comprising:
an interface that receives a new data set for a rank of a plurality of ranks to be stored in a memory comprising a plurality of cells;
a processor configured to perform operations of:
reading a current state of candidate cells within the plurality of cells wherein candidate cells are used to store the new data set;
creating a binary representation of the plurality of cells used to store the new data set;
using a WOM code to combine the binary representation with the new data set to create a binary WOM vector;
modifying the binary WOM vector to equal quantities of 1's and 0's within the candidate cells creating a new data vector;
writing the new data vector to the candidate cells.

### Claim 13 (depends on 12)

A memory controller as in claim 12, wherein the WOM is a polar WOM.

### Claim 14 (depends on 12)

A memory controller as in claim 12, wherein a cost of writing is defined as a maximum level of the plurality of cells after writing the new data vector minus a maximum level of the candidate cells before writing the new data vector.

### Claim 15 (depends on 14)

A memory controller as in claim 14, wherein the cost=1.

### Claim 16 (depends on 12)

A memory controller as in claim 12, wherein the processor is configured to perform operations further comprising:
reading the new data vector from the candidate cells;
modifying the new data vector to recreate the binary WOM vector;
using a WOM code on the binary WOM vector to separate the binary representation from the data set.

### Claim 17 (depends on 16)

A memory controller as in claim 16, wherein the WOM is a polar WOM.

### Claim 18

A memory controller comprising:
an interface that receives a new data set m for a rank to be stored in a memory device wherein the memory device comprises a plurality of cells;
a processor configured to perform operations of:
reading a current state of the plurality of cells within the plurality of cells are arranged according to a rank modulation scheme and the plurality of cells are used to store the new data set;
determine a new multi-permutation to be written to the plurality of cells representing the received data set m determined in accordance with a predetermined cost;
write the new multi-permutation to memory.

### Claim 19

A memory controller comprising:
an interface that receives a data value comprising a plurality of data sets wherein each data set is a set of values representing a rank in a plurality of ranks;
a processor configured to perform operations repeated for the data sets in the data value, the operations comprising:
receiving a new data set for a rank of the plurality of ranks to be stored in the memory device wherein the memory device comprises a plurality of cells;
reading a current state of candidate cells within the plurality of cells wherein candidate cells are used to store the new data set;
creating a binary representation of the plurality of cells used to store the new data set;
using a WOM code to combine the binary representation with the new data set to create a binary WOM vector;
modifying the binary WOM vector to equal quantities of 1's and 0's within the candidate cells creating a new data vector;
writing the new data vector to the candidate cells.

### Claim 20 (depends on 19)

A memory controller as in claim 19, wherein the WOM is a Polar WOM.

### Claim 21

A memory controller comprising:
an interface that provides access to a plurality of cells in a memory device;
a processor that accesses the plurality of cells through the interface and reads the plurality of cells and performs operations comprising determining a multi-permutation stored in the plurality of cells, and identifying a group of cells in the plurality of cells contained within each rank of a plurality of ranks and, for each rank, performing the operations of:
reading a new data vector from the rank;
modifying the new data vector to recreate a binary WOM vector;
using a WOM code on the binary WOM vector to separate a binary representation from a data set.

### Claim 22 (depends on 21)

A memory controller as in claim 21, wherein the WOM is a Polar WOM.

### Claim 23

A data device comprising:
a memory configured to store data values:
a memory controller that is configured to store the data values in the memory by performing operations comprising:
receiving a new data set for a rank of a plurality of ranks to be stored in the memory device wherein the memory device comprises a plurality of cells;
reading a current state of candidate cells within the plurality of cells wherein candidate cells are used to store the new data set;
creating a binary representation of the plurality of cells used to store the new data set;
using a WOM code to combine the binary representation with the new data set to create a binary WOM vector;
modifying the binary WOM vector to equal quantities of 1's and 0's within the candidate cells creating a new data vector;
writing the new data vector to the candidate cells.

### Claim 24 (depends on 23)

A data device as in claim 23, wherein the WOM is a Polar WOM.

### Claim 25 (depends on 23)

A data device as in claim 23, wherein a cost of writing is defined as a maximum level of the plurality of cells after writing the new data vector minus a maximum level of the candidate cells before writing the new data vector.

### Claim 26 (depends on 25)

A data device as in claim 25, wherein the cost=1.

### Claim 27 (depends on 23)

A data device as in claim 23, wherein the method further comprises:
reading the new data vector from the candidate cells;
modifying the new data vector to recreate the binary WOM vector;
using a WOM code or the binary WOM vector to separate the binary representation from the data set.

### Claim 28 (depends on 27)

A data device as in claim 27, wherein the WOM is a Polar WOM.

### Claim 29

A data device comprising:
a memory configured to store data values:
a memory controller that is configured to store the data values in the memory by performing operations comprising:
receiving a new data set m for a rank to store in the memory device wherein the memory device comprises a plurality of cells;
reading a current state of the plurality of cells within the plurality of cells are arranged according to a rank modulation scheme and the plurality of cells are used to store the new data set;
determine a new multi-permutation to be written to the plurality of cells representing the received data set m determined in accordance with a predetermined cost;
write the new multipermutation to memory.

### Claim 30

A data device comprising:
a memory configured to store data values:
a memory controller that is configured to store the data values in the memory by performing operations comprising:
receiving a data value comprising a plurality of data sets wherein each data set is a set of values representing a rank in a plurality of ranks and repeating for the data sets in the data value, operations comprising:
receiving a new data set for a rank of the plurality of ranks to be stored in the memory device wherein the memory device comprises a plurality of cells;
reading a current state of candidate cells within the plurality of cells wherein candidate cells are used to store the new data set;
creating a binary representation of the plurality of cells used to store the new data set;
using a WOM code to combine the binary representation with the new data set to create a binary WOM vector;
modifying the binary WOM vector to equal quantities of 1's and 0's within the candidate cells creating a new data vector;
writing the new data vector to the candidate cells.

### Claim 31 (depends on 30)

A data device as in claim 30, wherein the WOM is a Polar WOM.

### Claim 32

A data device comprising:
reading a plurality of cells and determining a multi-permutation stored in the plurality of cells;
identifying a group of cells in the plurality of cells, contained within each rank of a plurality of ranks;
for each rank, performing the steps of:
reading a new data vector from the rank;
modifying the new data vector to recreate a binary WOM vector;
using a WOM code on the binary WOM vector to separate a binary representation from a data set.

### Claim 33 (depends on 32)

A data device as in claim 32, wherein the WOM is a Polar WOM.