Slicer trim methodology and device
AssigneeLSI Corporation
InventorsVladimir Sindalovsky, Lane A. Smith, Niall Fitzgerald
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AssigneeLSI Corporation
InventorsVladimir Sindalovsky, Lane A. Smith, Niall Fitzgerald
Estimating the term…
Described embodiments provide for, in a receiver circuit employing a data latch, circuitry to adjust trim offset of the data latch to account for latch functional features (e.g., hysteresis and metastability) that may interact with trim of the latch. In accordance with the described embodiments, a trim procedure runs in a pre-selected directions of offset voltage ramp in order to average out the effect of hysteresis and metastability on the final trim offset choice. Different thresholds for accumulated slicer “0” and “1” discrimination of the circuitry to adjust trim offset allows for significant reduction in the number of trim runs, accelerating the slicers' trim process allowing for relatively quick determination of trim offset whenever the slicers are idle.
A method of generating a trim offset in a decision device, the method comprising:
Apparatus for generating a trim offset, the apparatus comprising:
A non-transitory machine-readable storage medium, having encoded thereon program code, wherein, when the program code is executed by a machine, the machine implements a method for generating a trim offset in a decision device, comprising the steps of:
Dependencies are inferred from the claim text.