Error correction with secondary memory
AssigneeFreescale Semiconductor, Inc.
InventorsGEORGE P. HOEKSTRA, RA VINDRARAJ RAMARAJU
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Abstract
A memory system includes a memory having a plurality of address locations, each address location configured to store data and one or more error correction bits corresponding to the data. A secondary memory includes a plurality of entries, and each entry configured to store an address value of an address location of the memory and one or more error correction bits corresponding to the data stored at the address location of the memory. The error correction bits in the secondary memory can be used to correct errors in a subset of the memory having a different number of storage bits than the error correction bits in the memory.
Claims20
A memory system comprising:
- a memory having a plurality of address locations, each address location configured to store data and one or more error correction bits corresponding to the data;
- and
- a secondary memory, wherein the secondary memory includes a plurality of entries, each entry configured to store one or more error correction bits corresponding to the data stored at an address location of the memory, the error correction bits in the secondary memory being used to correct errors in a subset of the memory having a different number of storage bits than the error correction bits in the memory.
In a memory system, a method comprising:
- receiving a request to access to a first address location of a memory, wherein the first address location of the memory stores data and one or more corresponding error correction bits;
- in response to the access request:
- determining if error correction bits in a secondary memory are to be used to correct errors in the data, wherein the error correction bits in the secondary memory are used to correct a different number of bits in the memory than the error correction bits in the memory;
- if the error correction bits in the secondary memory are to be used to correct errors in the data, using the error correction bits stored in the secondary memory to determine if an error is present in at least a portion of the data stored in the memory.
A memory system comprising:
- a nonvolatile memory having a plurality of address locations, each address location configured to store data and one or more error correction bits corresponding to the data;
- a secondary memory, wherein the secondary memory includes a plurality of entries, each entry configured to store an address value of an address location of the memory and one or more error correction bits corresponding to the data stored at the address location of the memory;
- and
- a memory controller coupled to the memory and the secondary memory, wherein the memory controller is configured to:
- use a number associated with a size of a respective subsection of the memory to index into the secondary memory;
- determine if the error correction bits in the secondary memory are to be used to correct errors in the data ;
- and
- if the error correction bits in the secondary memory are to be used to correct errors in the data, use the one or more error correction bits stored at the address location of the memory to determine if an error is present in the data stored at the address location, wherein the amount of data for which errors are corrected using the error correction bits in the secondary memory is different than the amount of data for which errors are corrected using the error correction bits in the nonvolatile memory.
Dependencies are inferred from the claim text.