Method of fabricating a three-dimensional semiconductor memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsSang-Yong PARK, Jintaek PARK
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Abstract
A three-dimensional semiconductor device includes a stacked structure including a plurality of conductive layers stacked on a substrate, a distance along a first direction between sidewalls of an upper conductive layer and a lower conductive layer being smaller than a distance along a second direction between sidewalls of the upper conductive layer and the lower conductive layer, the first and second directions crossing each other and defining a plane parallel to a surface supporting the substrate, and vertical channel structures penetrating the stacked structure.
Claims16
-20. (canceled)
A method of fabricating a three-dimensional (3D) semiconductor device comprising:
- forming a stack structure including a plurality of horizontal layers sequentially stacked on a substrate, the substrate including a cell array region, a first pad region adjacent to the cell array region in a first direction, and a second pad region adjacent to the cell array region in a second direction perpendicular to the first direction,
- forming a mask pattern covering the cell array region, the mask pattern having a first sidewall located on the first pad region and a second sidewall located on the second pad region
- performing an etching process using the mask pattern as an etch mask on the stack structure;
- and
- after performing the etching process, performing a process of enlarging the area of the mask pattern,
- wherein the performing the process of enlarging the area of the mask pattern includes laterally moving the first sidewall of the mask pattern by a first distance and laterally moving the second sidewall of the mask pattern by a second distance less than the first distance.
A method of fabricating a three-dimensional (3D) semiconductor device comprising:
- forming a stack structure including a plurality of horizontal layers sequentially stacked on a substrate, the substrate including a cell array region, a first pad region adjacent to the cell array region in a first direction, and a second pad region adjacent to the cell array region in a second direction perpendicular to the first direction,
- forming a mask pattern covering the cell array region on the stack structure;
- etching the stack structure using the mask pattern as an etch mask;
- and
- alternately and repeatedly performing the forming the mask pattern and the etching the stack structure to form a stepped structure including a plurality of horizontal patterns sequentially stacked on a substrate,
- wherein each of the horizontal patterns includes a first pad on the first pad region having a first width and a second pad on the second pad region having a second width less than the first width.
Dependencies are inferred from the claim text.