Trench vertical nand and method of making thereof
AssigneeSanDisk Technologies LLC
InventorsAkira Matsudaira, James Kai, Yuan Zhang, Vinod Purayath, Donovan Lee
Life of this patent
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Abstract
A method of making a monolithic three dimensional NAND string includes providing a stack of alternating first material layers and second material layers different from the first material layer over a substrate, etching the stack to form at least one trench in the stack, forming a blocking dielectric over a side wall of the at least one trench, forming a charge storage layer over the blocking dielectric in the at least one trench, forming a tunnel dielectric over the charge storage layer in the at least one trench and forming a semiconductor channel over the tunnel dielectric in the at least one trench.
Claims35
A method of making a monolithic three dimensional NAND string, comprising:
- providing a stack of alternating first material layers and second material layers different from the first material layer over a substrate;
- etching the stack to form at least one trench in the stack;
- forming a blocking dielectric over a side wall of the at least one trench;
- forming a charge storage layer over the blocking dielectric in the at least one trench;
- forming a tunnel dielectric over the charge storage layer in the at least one trench;
- and
- forming a semiconductor channel over the tunnel dielectric in the at least one trench.
A monolithic three dimensional NAND string, comprising:
- a plurality of rails separated by a plurality of trenches, wherein each of the plurality of rails comprises stack of alternating insulating layers and electrically conductive control gate layers located over a major surface of a substrate;
- a semiconductor channel which extends over an upper surface of the plurality of rails and over a bottom surface and side walls of the plurality of trenches, wherein at least one portion of the semiconductor channel extends substantially perpendicular to the major surface of the substrate in at least one of the plurality of trenches;
- a blocking dielectric located in the plurality of trenches in contact with the plurality of control gate layers;
- a charge storage region located over the blocking dielectric;
- and
- a tunnel dielectric located between the charge storage region and the semiconductor channel.
Dependencies are inferred from the claim text.