Memory device and manufacturing method thereof

A memory device comprising:

• an array of memory cells, at least one of the memory cells comprising:
• a plurality of transistors with vertical-gate-all-around configurations;
• and
• a plurality of active blocks, a portion of one of the active blocks serving as a source or a drain of one of the transistors,
• wherein the active blocks in one of the memory cells are distant from boundaries of said memory cell.

A method for manufacturing a memory device, comprising:

• forming an array of memory cells on or above a substrate, wherein forming at least one of the memory cells comprises:
• forming a plurality of active blocks on or above the substrate, and the active blocks in any adjacent two of the memory cells are isolated from each other;
• and
• forming a plurality of transistors with vertical-gate-all-around configurations on or above the substrate, wherein a portion of at least one of the active blocks serves as a source or a drain of one of the transistors.