Semiconductor chip having different conductive pad widths and method of making layout for same

A method of preparing a layout for manufacturing a semiconductor chip, comprising:

• selecting a first set of bump positions of a plurality of bump positions occupying a first region of the semiconductor chip;
• selecting a second set of bump positions of the plurality of bump positions occupying a second region of the semiconductor chip, the second region being farther from a geometric center of the semiconductor chip than the first region;
• selecting a third set of bump positions of the plurality of bump positions occupying a third region of the semiconductor chip, the third region being farther from the geometric center than the first region and closer to the geometric center than the second region;
• forming one or more first conductive pad patterns and corresponding first under bump metallurgy (UBM) patterns having a first pad width to UBM width ratio at the first set of bump positions;
• forming one or more second conductive pad patterns and corresponding second UBM patterns, having a second pad width to UBM width ratio greater than the first ratio, at the second set of bump positions;
• and
• forming one or more third conductive pad patterns and corresponding third UBM patterns, having a third pad width to UBM width ratio, at the third set of bumps positions, the third ratio being different from the first ratio and from the second ratio,
• wherein the third region is an area defined over the semiconductor between the first region and the second region.

A semiconductor chip, comprising:

• a first conductive pad over a substrate;
• a first under bump metallurgy (UBM) structure over the first conductive pad, the first conductive pad and the first UBM structure have a first pad width to UBM width ratio, and the first conductive pad is substantially the same in shape compared to the first UBM structure;
• a second conductive pad over the substrate and positioned farther from a geometric center of the semiconductor chip than the first conductive pad;
• and
• a second UBM structure formed over the second conductive pad, the second conductive pad and the second UBM structure have a second pad width to UBM width ratio greater than the first ratio, and the second conductive pad is substantially the same in shape compared to the second UBM structure.