Semiconductor device
AssigneeRenesas Electronics Corporation
InventorsShinichi UCHIDA, Hirokazu NAGASE, Takuo FUNAYA
Life of this patent
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Abstract
On a semiconductor substrate, coils CL5 and CL6 and pads PD5, PD6, and PD7 are formed. The coil CL5 and the coil CL6 are electrically connected in series between the pad PD5 and the pad PD6, and the pad PD7 is electrically connected between the coil CL5 and the coil CL6. The coil magnetically coupled to the coil CL5 is formed just below the coil CL5, the coil magnetically coupled to the coil CL6 is formed just below the coil CL6, and they are connected in series. When a current is flowed in the coils connected in series formed just below the coils CL5 and CL6, directions of induction current flowing in the coils CL5 and CL6 are opposed to each other in the coils CL5 and CL6.
Claims20
A semiconductor device comprising:
- a semiconductor substrate;
- and
- a first coil, a second coil, a third coil, a fourth coil, a first pad, a second pad, and a third pad formed on the semiconductor substrate through an insulation film,
- wherein the first coil and the third coil are electrically connected in series between the first pad and the second pad,
- the third pad is electrically connected between the first coil and the third coil,
- the second coil and the fourth coil are electrically connected in series,
- the first coil is arranged above the second coil,
- the third coil is arranged above the fourth coil,
- the first coil and the second coil are not connected by a conductor but are magnetically coupled to each other,
- the third coil and the fourth coil are not connected by a conductor but are magnetically coupled to each other, and,
- when a current is flowed in the second coil and the fourth coil connected in series, directions of induction currents flowing in the first coil and the third coil are opposed to each other in the first coil and the third coil.
A semiconductor device including a first semiconductor chip and a second semiconductor chip,
- wherein the first semiconductor chip has a first coil, a second coil, a third coil, a fourth coil, a first pad, a second pad, and a third pad,
- the second semiconductor chip has a plurality of fourth pads,
- the first coil and the third coil are electrically connected in series between the first pad and the second pad,
- the third pad is electrically connected between the first coil and the third coil,
- the second coil and the fourth coil are electrically connected in series,
- within the first semiconductor chip, the first coil is arranged above the second coil, and the third coil is arranged above the fourth coil,
- the first coil and the second coil are not connected by a conductor but are magnetically coupled to each other,
- the third coil and the fourth coil are not connected by a conductor but are magnetically coupled to each other,
- the first pad, the second pad and the third pad of the first semiconductor chip are electrically connected to the plurality of fourth pads of the second semiconductor chip through conductive connection members, respectively,
- when a current is flowed in the second coil and the fourth coil connected in series, directions of induction currents flowing in the first coil and the third coil are opposed to each other in the first coil and the third coil.
A semiconductor device comprising:
- a semiconductor substrate;
- and
- a first coil and a second coil formed on the semiconductor substrate through an insulation layer,
- wherein the first coil is arranged above the second coil,
- the first coil and the second coil are not connected by a conductor but are magnetically coupled to each other, and
- a first wiring extending so as to overlap with the first coil in a plan view is formed in a layer different from the first coil and the second coil, and
- the first wiring has a slit at a position overlapping with the first coil in a plan view.
Dependencies are inferred from the claim text.