Integrated circuit package substrate
AssigneeIntel Corporation
InventorsQinglei ZHANG, Stefanie M. LOTZ
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AssigneeIntel Corporation
InventorsQinglei ZHANG, Stefanie M. LOTZ
Estimating the term…
Embodiments of the present disclosure are directed towards techniques and configurations for dual surface finish package substrate assemblies. In one embodiment a method includes depositing a first lamination layer on a first side of a package substrate and a first surface finish on one or more electrical contacts disposed on a second side of the package substrate; removing the first lamination layer from the first side of the package substrate; depositing a second lamination layer on the second side of the package substrate and a second surface finish on the one or more electrical contacts disposed on the first side of the package substrate; and removing the second lamination layer from the second side of the package substrate. Other embodiments may be described and/or claimed.
A method of forming an integrated circuit (IC) package substrate comprising:
A package substrate comprising:
A package assembly comprising:
-25. (canceled)
Dependencies are inferred from the claim text.