Shift register unit, gate drive circuit and display device
AssigneesBoe Technology Group Co., Ltd., Beijing Boe Optoelectronics Technology Co., Ltd.
InventorJinyu LI
Life of this patent
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Abstract
According to this disclosure, a shift register unit includes a pull-up control module, a pull-up module, a pull-down control module and a pull-down module, wherein the pull-up module is adapted to provide a transmission signal output terminal with a first clock signal inputted from a first clock signal input terminal according to the pull-up control signal, and provide a gate drive signal output terminal with a first direct current supply voltage according to the pull-up control signal and the first clock signal inputted from the first clock signal input terminal.
Claims20
A shift register unit, comprising:
- a pull-up control module which is adapted to output a pull-up control signal to a pull-up node according to a transmission signal inputted from a transmission signal input terminal, and the pull-up node is on a wire connecting the pull-up control module and the pull-up module;
- a pull-up module which is adapted to provide a transmission signal output terminal with a first clock signal inputted from a first clock signal input terminal according to the pull-up control signal, and provide a gate drive signal output terminal with a first direct current supply voltage according to the pull-up control signal and the first clock signal;
- a pull-down control module which is adapted to output a pull-down control signal to a pull-down node according to the first clock signal, and the pull-down node is on a wire connecting the pull-down control module and the pull-down module;
- and
- a pull-down module which is adapted to provide the pull-up node, the transmission signal output terminal and the gate drive signal output terminal with a second direct current supply voltage according to the pull-down control signal, a reset signal inputted from a reset signal input terminal and a second clock signal inputted from a second clock signal input terminal;
- and the first clock signal inputted from the first clock signal input terminal and the second clock signal inputted from the second clock signal input terminal are opposite in phase.
A gate drive circuit, comprising a plurality of shift register units each comprising:
- a pull-up control module which is adapted to output a pull-up control signal to a pull-up node according to a transmission signal inputted from a transmission signal input terminal, and the pull-up node is on a wire connecting the pull-up control module and the pull-up module;
- a pull-up module which is adapted to provide a transmission signal output terminal with a first clock signal inputted from a first clock signal input terminal according to the pull-up control signal, and provide a gate drive signal output terminal with a first direct current supply voltage according to the pull-up control signal and the first clock signal;
- a pull-down control module which is adapted to output a pull-down control signal to a pull-down node according to the first clock signal, and the pull-down node is on a wire connecting the pull-down control module and the pull-down module;
- and
- a pull-down module which is adapted to provide the pull-up node, the transmission signal output terminal and the gate drive signal output terminal with a second direct current supply voltage according to the pull-down control signal, a reset signal inputted from a reset signal input terminal and a second clock signal inputted from a second clock signal input terminal;
- and the first clock signal inputted from the first clock signal input terminal and the second clock signal inputted from the second clock signal input terminal are opposite in phase,
- wherein except for a first shift register unit and a last shift register unit, each shift register unit has its transmission signal output terminal connected to the reset signal input terminal of a previous shift register unit adjacent to this shift register unit and the transmission signal input terminal of a next shift register unit adjacent to this shift register unit, gate drive signals outputted from the gate drive signal output terminals of the shift register units are outputted from the gate drive circuit in sequence;
- the transmission signal output terminal of the first shift register unit is connected to a transmission signal input terminal of a second shift register unit, the transmission signal output terminal of the last shift register unit is connected to the reset signal input terminal of a previous shift register unit adjacent to the last shift register unit;
- and
- a frame start signal is inputted from the transmission signal input terminal of the first shift register unit.
A display device, comprising the gate drive circuit, wherein the gate drive circuit comprises a plurality of shift register units each comprising:
- a pull-up control module which is adapted to output a pull-up control signal to a pull-up node according to a transmission signal inputted from a transmission signal input terminal, and the pull-up node is on a wire connecting the pull-up control module and the pull-up module;
- a pull-up module which is adapted to provide a transmission signal output terminal with a first clock signal inputted from a first clock signal input terminal according to the pull-up control signal, and provide a gate drive signal output terminal with a first direct current supply voltage according to the pull-up control signal and the first clock signal;
- a pull-down control module which is adapted to output a pull-down control signal to a pull-down node according to the first clock signal, and the pull-down node is on a wire connecting the pull-down control module and the pull-down module;
- and
- a pull-down module which is adapted to provide the pull-up node, the transmission signal output terminal and the gate drive signal output terminal with a second direct current supply voltage according to the pull-down control signal, a reset signal inputted from a reset signal input terminal and a second clock signal inputted from a second clock signal input terminal;
- and the first clock signal inputted from the first clock signal input terminal and the second clock signal inputted from the second clock signal input terminal are opposite in phase,
- wherein except for a first shift register unit and a last shift register unit, each shift register unit has its transmission signal output terminal connected to the reset signal input terminal of a previous shift register unit adjacent to this shift register unit and the transmission signal input terminal of a next shift register unit adjacent to this shift register unit, gate drive signals outputted from the gate drive signal output terminals of the shift register units are outputted from the gate drive circuit in sequence;
- the transmission signal output terminal of the first shift register unit is connected to a transmission signal input terminal of a second shift register unit, the transmission signal output terminal of the last shift register unit is connected to the reset signal input terminal of a previous shift register unit adjacent to the last shift register unit;
- and
- a frame start signal is inputted from the transmission signal input terminal of the first shift register unit.
Dependencies are inferred from the claim text.