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AssigneeQUALCOMM Incorporated
InventorsXiangyu Dong, Jungwon Suh
Estimating the term…
Priority adjustment of dynamic random access memory (DRAM) transactions prior to issuing a per-bank refresh for reducing DRAM unavailability is disclosed. In one aspect, DRAM is refreshed on a per-bank basis. If a queued memory transaction corresponds to a memory bank that will soon be refreshed, the transaction may be delayed if a refresh of the corresponding memory bank begins prior to execution of the transaction. To avoid delaying execution of the transaction while waiting for the corresponding memory bank to be refreshed, a priority of the memory transactions may be adjusted based on a memory bank refresh schedule. The priority of the transaction corresponding to the memory bank to be refreshed may be increased, and the priority of other memory transactions may be decreased, if such an adjustment would avoid or reduce delaying execution due to unavailability of the corresponding memory bank.
A dynamic random access memory (DRAM) memory controller, comprising:
A dynamic random access memory (DRAM) memory controller, comprising:
A method for adjusting a priority of dynamic random access memory (DRAM) transactions prior to a per-bank refresh of a DRAM, comprising:
A non-transitory computer-readable medium having stored thereon computer executable instructions which, when executed by a processor, cause the processor to:
Dependencies are inferred from the claim text.