Data path system on chip design methodology
AssigneeQUALCOMM Incorporated
InventorsStanley Seungchul SONG, Niladri Narayan MOJUMDER, Zhongze WANG, Choh Fei YEAP
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Abstract
Integrated circuit (IC) technology design may include binning data paths of an IC device of a current technology node to bins based on a performance of each of the data paths. Each of the plurality of bins is mapped to a representative circuit unit data path configured according to a predetermined set of electrical and/or physical parameters. The representative circuit unit data paths are calibrated according to updated electrical and/or physical parameters to increase the performance of the representative circuit unit data paths to improve the performance of the IC device in an advanced technology node.
Claims30
A method of integrated circuit (IC) technology design, comprising:
- binning data paths of an IC device of a current technology node to a plurality of bins based at least in part on a performance of each of the data paths;
- mapping each of the plurality of bins to at least one representative circuit unit data path configured according to a predetermined set of electrical and/or physical parameters;
- and
- calibrating a set of representative circuit unit data paths according to updated electrical and/or physical parameters to increase the performance of the set of representative circuit unit data paths to improve the performance of the IC device of an advanced technology node.
A device for designing an integrated circuit (IC), comprising:
- means for binning data paths of an IC device of a current technology node to a plurality of bins based at least in part on a performance of each of the data paths;
- means for mapping each of the plurality of bins to at least one representative circuit unit data path configured according to a predetermined set of electrical and/or physical parameters;
- and
- means for calibrating a set of representative circuit unit data paths according to updated electrical and/or physical parameters to increase the performance of the set of representative circuit unit data paths to improve the performance of the IC device of an advanced technology node.
A device for designing an integrated circuit (IC), comprising:
- a memory;
- and
- a processor, coupled to the memory, configured:
- to bin data paths of an IC device of a current technology node to a plurality of bins based at least in part on a performance of each of the data paths;
- to map each of the plurality of bins to at least one representative circuit unit data path configured according to a predetermined set of electrical and/or physical parameters;
- and
- to calibrate a set of representative circuit unit data paths according to updated electrical and/or physical parameters to increase the performance of the set of representative circuit unit data paths to improve the performance of the IC device of an advanced technology node.
A computer program product configured to design an integrated circuit (IC), the computer program product comprising:
- a non-transitory computer-readable medium having non-transitory program code recorded thereon, the non-transitory program code comprising:
- program code to bin data paths of an IC device of a current technology node to a plurality of bins based at least in part on a performance of each of the data paths;
- program code to map each of the plurality of bins to at least one representative circuit unit data path configured according to a predetermined set of electrical and/or physical parameters;
- and
- program code to calibrate a set of representative circuit unit data paths according to updated electrical and/or physical parameters to increase the performance of the set of representative circuit unit data paths to improve the performance of the IC device of an advanced technology node.
Dependencies are inferred from the claim text.