Adjustment of Interrupt Timestamps of Signals from a Sensor Based on an Estimated Sampling Rate of the Sensor

A computer readable memory having stored therein instructions, that when executed by a computing device, cause the computing device to perform functions comprising:

• receiving, from a sensor, an interrupt signal;
• storing an interrupt timestamp corresponding to the interrupt signal;
• determining a plurality of expected sampling rates associated with the sensor, wherein a given sampling rate is based on a sampling time period;
• determining a first minimal latency timestamp based on a comparison of one or more previously stored interrupt timestamps and the plurality of expected sampling rates;
• determining a second minimal latency timestamp based on the interrupt timestamp, one or more previously stored interrupt timestamps, and the plurality of expected sampling rates, wherein the second minimal latency timestamp indicates an interrupt timestamp among the interrupt timestamp and the one or more previously stored interrupt timestamps whose value results in a smallest latency value;
• determining an estimated sampling rate of the sensor based on the first minimal latency timestamp and the second minimal latency timestamp;
• and
• determining an adjusted interrupt timestamp corresponding to the interrupt signal based on the estimated sampling rate and the interrupt timestamp.

A computing device comprising:

• one or more processors;
• a sensor;
• and
• data storage configured to store instructions that, when executed by the one or more processors, cause the computing device to perform functions comprising:
• receiving, by the one or more processors from the sensor, an interrupt signal;
• storing, by the one or more processors, an interrupt timestamp corresponding to the interrupt signal;
• determining, by the one or more processors, a plurality of expected sampling rates associated with the sensor, wherein a given sampling rate is based on a sampling time period;
• determining, by the one or more processors, a first minimal latency timestamp based on a comparison of one or more previously stored interrupt timestamps and the plurality of expected sampling rates;
• determining, by the one or more processors, a second minimal latency timestamp based on the interrupt timestamp, one or more previously stored interrupt timestamps, and the plurality of expected sampling rates, wherein the second minimal latency timestamp indicates an interrupt timestamp among the interrupt timestamp and the one or more previously stored interrupt timestamps whose value results in a smallest latency value;
• determining, by the one or more processors, an estimated sampling rate of the sensor based on the first minimal latency timestamp and the second minimal latency timestamp;
• and
• determining, by the one or more processors, an adjusted interrupt timestamp corresponding to the interrupt signal based on the estimated sampling rate and the interrupt timestamp.