Onboard electronic control unit
AssigneeDenso Corporation
InventorsMasato KUME, Yasushi KANDA
Life of this patent
Estimating the term…
Abstract
Provided is an onboard electronic control unit. A CPU regularly performs a memory check and, if a determination has been made that there is an error in the memory content, writes the number of times an error has been determined to an error count storage unit, and resets itself. Immediately after the CPU has been reset and before the first memory check is performed, an error determination unit determines whether or not the error count stored in the error count storage unit is at least an error determination threshold. If the error count is at least the error determination threshold, an error response unit causes the CPU to execute a specific error response program, out of the programs in the memory.
Claims5
An onboard electronic control unit comprising:
- a nonvolatile memory that stores a plurality of programs including a control program for controlling a vehicle;
- a CPU that executes the plurality of programs and periodically performs memory check of whether or not a storage content in the memory is normal, and that executes a reset of the CPU itself when it is determined by the memory check that the storage content in the memory is abnormal;
- an abnormality frequency storage unit that stores the number of abnormalities defined as the number of times it is determined by the memory check that the storage content in the memory is abnormal;
- an abnormality frequency update unit that, every time it is determined by the memory check that the storage content in the memory is abnormal, updates the number of abnormalities stored in the abnormality frequency storage unit before the reset of the CPU is executed;
- an abnormality determination unit that determines whether or not the number of abnormalities stored in the abnormality frequency storage unit is equal to or larger than a predetermined abnormality determination threshold, before the memory check is performed for the first time since the reset of the CPU;
- and
- an abnormality handling unit that allows the CPU to execute a specific error handling processing program among the plurality of programs when the abnormality determination unit determines that the number of abnormalities is equal to or larger than the abnormality determination threshold,
- wherein
- during executing the error handling processing program, the CPU is prohibited from executing the memory check or from executing the reset of the CPU based on the memory check.
Dependencies are inferred from the claim text.