Fiber optic gyroscope dead band error suppression

An interferometric fiber optic gyroscope (IFOG) comprising:

• a fiber optic coil;
• a light source configured to generate a light beam for input into the fiber optic coil;
• a phase modulator to modulate the light beam;
• a photodetector to convert an output light signal from the fiber optic coil into an electrical signal;
• and
• demodulating electronics configured to provide a signal indicative of a rotation rate sensed by the fiber optic coil and to generate a feedback signal for the phase modulator, the control electronics configured to:
• generate a bias modulation value for bias modulation of the input light beam;
• accumulate phase step corresponding to a difference in phase shift between outputs of the fiber optic coil in adjacent cycles of the IFOG to generate a phase step;
• generate a feedback signal for modulating the input light beam, the feedback signal corresponding to a sum of the bias modulation value and the phase step;
• intermittently jump the phase step to suppress dead band, wherein jumping the phase step includes generating a feedback signal based on a jumped phase step;
• and
• if a bit flip was clocked into a digital to analog converter generating the feedback signal at the beginning of a cycle in which the jumped phase step is implemented, at least one of re-introduce a rate difference corresponding to the bit flip, alter the timing of the bit flip, or alter the timing of the generating a feedback signal based on the jumped phase step.

A method of jumping a phase step to suppress dead band during modulation of an input light beam of a fiber optic coil of an interferometric fiber optic gyroscope (IFOG), the method comprising:

• during a first cycle of the IFOG:
• demodulating a first cycle output of the fiber optic coil to determine a first cycle rate difference between the first cycle output and a previous output of the fiber optic coil;
• accumulating the first cycle rate difference with a prior raw rate to generate a first cycle raw rate;
• storing the first cycle raw rate;
• creating a jumped phase step;
• generating a first cycle bias modulation value for bias modulation of the input light beam;
• and
• generating a first cycle feedback signal from a sum of the first cycle bias modulation value and the jumped phase step;
• during a second cycle, the second cycle immediately following the first cycle:
• demodulating a second cycle output of the fiber optic coil to determine a second cycle rate difference between the second cycle output and the first cycle output of the fiber optic coil;
• accumulating the second cycle rate difference with the first cycle raw rate to generate a second cycle raw rate;
• storing second cycle raw rate;
• holding a second cycle phase step at the jumped phase step;
• generating a second cycle bias modulation value for bias modulation of the input light beam;
• generating a second cycle feedback signal from a sum of the second cycle bias modulation value and the second cycle phase step;
• during a third cycle, the third cycle immediately following the second cycle:
• discarding a raw rate for the third cycle;
• and
• accumulating the first cycle raw rate with the second cycle phase step to generate a third cycle phase step;
• and
• generating a third cycle bias modulation value for bias modulation of the input light beam;
• generating a third cycle feedback signal from a sum of the third cycle bias modulation value and the third cycle phase step;
• during a fourth cycle, the fourth cycle immediately following the third cycle:
• discarding a raw rate for the fourth cycle;
• and
• accumulating the second cycle raw rate with the third cycle phase step to generate a fourth cycle phase step;
• generating a third cycle bias modulation value for bias modulation of the input light beam;
• and
• generating a fourth cycle feedback signal from a sum of the fourth cycle bias modulation value and the fourth cycle phase step;
• if a bit flip was clocked into a digital to analog converter generating the feedback signal at the beginning of the first cycle, at least one of re-introducing a rate difference corresponding to the bit flip, altering the timing of the bit flip, or altering the timing of the generating a feedback signal based on the jumped phase step;
• wherein the phase step includes a whole value which is one or more most significant bits of the phase step and a fractional value which is the remaining least significant bits of the phase step, wherein the number of the one or more most significant bits in the whole value is the number of bits operated on by the digital to analog converter which generates the feedback signal,
• wherein the jumped phase step has a whole value configured to cause a phase jump in the feedback signal and a fractional value corresponding to the fractional value from a phase step of a cycle immediately preceding the first cycle;
• generating a phase jump impulse including the whole value configured to cause a phase jump in the feedback signal;
• and
• summing the phase jump impulse with the fractional value from the phase step of the cycle immediately preceding the first cycle.