Image processing device
AssigneeKabushiki Kaisha Toshiba
InventorsYukiyasu TATSUZAWA, Kazuhiro HIWADA, Tatsuji ASHITANI
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Abstract
According to one embodiment, an image processing device includes a line memory that stores an input image by a plurality of rows; a defect correcting circuit that performs defect correction on the input image based on image data stored in the line memory; a binning circuit that generates a low pass image having a lower spatial frequency than the input image by binning the input image subjected to the defect correction; a frame buffer that stores the low pass image; a filter that generates a high pass image having a higher spatial frequency than the low pass image by filtering the input image subjected to the defect correction; and a mixing circuit that mixes the low pass image with the high pass image.
Claims17
An image processing device comprising:
- a line memory that stores an input image by a plurality of rows;
- a binning circuit that generates a low pass image having a lower spatial frequency than the input image by binning the input image;
- a frame buffer that stores the low pass image;
- a filter that generates a high pass image having a higher spatial frequency than the low pass image by filtering the input image stored in the line memory;
- a mixing circuit that mixes the low pass image with the high pass image;
- and
- a sequencer that controls use of the low pass image in the mixing circuit based on correlation between the input images.
Dependencies are inferred from the claim text.