Scalable serial/de-serial i/o for chip-to-chip connection based on multi-frequency qam scheme
AssigneeThe Regents of the University of California
InventorsSheau Jiung Lee, Mau-Chung Frank Chang, Yanghyo Kim
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AssigneeThe Regents of the University of California
InventorsSheau Jiung Lee, Mau-Chung Frank Chang, Yanghyo Kim
Estimating the term…
A serializer and de-serializer circuit which is particularly well-suited for use in communicating digital data from one integrated circuit (chip) to another for implementing chip-to-chip communications is presented. The circuits are scalable and utilize a multi-frequency quadrature amplitude modulation (QAM) mechanism for converting digital data bits from a parallel form into a serial analog stream for communication over a chip I/O connection. The serializer has multiple digital-to-analog converters (DACs) whose outputs are directed to QAM mixer inputs, within QAMs at multiple frequencies, whose outputs are summed into a single analog signal for communication over an I/O connection. The de-serializer amplifies the analog signal which is received by QAM mixers at different frequencies, whose outputs are low pass filtered and converted back to parallel digital data bits.
An apparatus for serializing and de-serializing chip-to-chip communications, comprising:
An apparatus for serializing and de-serializing chip-to-chip communications, comprising:
A serializer apparatus for chip-to-chip communications, comprising:
A de-serializer apparatus for chip-to-chip communications, comprising:
Dependencies are inferred from the claim text.