Decoder for a memory device, memory device and method of decoding a memory device

A memory device comprising:

• a sense amplifier circuitry configured to provide one or more data words;
• a decoder comprising:
• an error detection circuitry configured to multiply a vector of the one or more data words for which an error detection is to be carried out with a parity matrix to determine a plurality of syndrome values and generate a plurality of coefficients from multiplying a syndrome vector with an inverse of a syndrome matrix, wherein both the syndrome vector and the syndrome matrix comprise the plurality of syndrome values;
• and
• an error correction circuitry configured to perform a Chien search on a first part of the plurality of coefficients to determine a first set of error indicators indicating error locations in a first part of the one or more data words, and subsequently perform a Chien search on a second part of the plurality of coefficients to determine a second set of error indicators indicating error locations in a second part of the one or more data words;
• and
• a data register configured to store the one or more data words and the plurality of coefficients,
• wherein the error detection circuitry is arranged between the sense amplifier circuitry and the data register.

A method of decoding a memory device, the method comprising:

• multiplying a vector of one or more data words for which an error detection is to be carried out with a parity matrix to determine a plurality of syndrome values;
• generating a plurality of coefficients from multiplying a syndrome vector with an inverse of a syndrome matrix, wherein both the syndrome vector and the syndrome matrix comprise the plurality of syndrome values;
• performing a Chien search on a first part of the plurality of coefficients to determine a first set of error indicators indicating error locations in a first part of the one or more data words;
• and
• subsequently performing a Chien search on a second part of the plurality of coefficients to determine a second set of error indicators indicating error locations in a second part of the one or more data words.