Pll with across-stage controlled dco

A phase lock loop (PLL) comprising:

• a first detector configured to receive a first tuning code which controls an output frequency of a DCO to be tuned by a first step size and generate a first detect signal which indicates whether the first tuning code exceeds a first range that the first tuning code is allowed to tune the output frequency;
• a second tuning code adjustor configured to adjust the second tuning code which controls the output frequency of the DCO to be tuned by a second step size,
• the second tuning code being adjusted in response to the first detect signal, and
• the second step size being larger than the first step size;
• and
• the DCO configured to generate the output frequency in response to codes comprising the adjusted second tuning code.

A method, comprising:

• receiving, by at least one processor, a first tuning code in a current stage in which an output frequency is tuned by a first step size;
• detecting, by the at least one processor, whether the first tuning code exceeds a first range that the output frequency can be correspondingly tuned in the current stage;
• adjusting a second tuning code, by the at least one processor, from a previous stage in which the output frequency is tuned by a second step size if the first tuning code exceeds a first range that the output frequency can be correspondingly tuned in the current stage,
• the second step size being larger than the first step size.
• generating the output frequency in response to codes comprising the adjusted second tuning code.