Spare gate cell for integrated circuit
AssigneeFreescale Semiconductor, Inc.
InventorsReecha Jajodia, Gaurav Goyal
Life of this patent
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Abstract
Spare gate cells for inclusion in an integrated circuit have multiple inputs and outputs and are capable of selectively performing, concurrently, multiple logic functions on signals appearing at the inputs. Selection of required logic functions depends on the connections of at least one of the inputs of the spare cell. One of the outputs is fed back to an input of the spare gate cell to provide certain functionality while other outputs are set to a fixed logical value. The spare gate cell may be configured to perform NOR, OR and inverter operations on inputs simultaneously.
Claims10
A spare gate cell, comprising:
- at least two inputs and at least two outputs, wherein the spare gate cell is capable of selectively performing, concurrently, a plurality of logic functions on signals appearing at the inputs to produce logic signals at the outputs, wherein selection of said plurality of logic functions depends on connections of at least one of the inputs of the spare cell,
- wherein at least one input, which is not included in a subset of inputs, is set to a predetermined logical value to provide a function set of logical operations to be performed on the sub-set of inputs.
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A spare gate cell, comprising:
- at least two inputs and at least two outputs, wherein the spare gate cell is capable of selectively performing, concurrently, a plurality of logic functions on signals appearing at the inputs to produce logic signals at the outputs, wherein selection of said plurality of logic functions depends on connections of at least one of the inputs of the spare cell,
- wherein at least one input, which is not included in a subset of inputs, is connected to an output of the spare gate cell to provide a function set of logical operations to be performed on the sub-set of inputs.
An integrated circuit, comprising:
- at least one spare gate cell having at least two inputs and at least two outputs, wherein the spare gate cell is capable of selectively performing, concurrently, a plurality of logic functions on signals appearing at the inputs to produce logic signals at the outputs, wherein selection of the plurality of logic functions depends on connections of at least one of the inputs of the spare gate cell,
- wherein at least one input of the spare gate cell, which is not included in a subset of inputs, is connected to an output of the spare gate cell to provide a function set of logical operations to be performed on the subset of inputs.
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Dependencies are inferred from the claim text.