Receiver circuit

A receiver circuit comprising:

• a first amplifier circuit configured to differentially amplify differential input signals by a linear operation;
• a second amplifier circuit configured to differentially amplify differential signals output from differential output nodes of the first amplifier circuit by a limiting operation;
• a first resistor having one end coupled to a first positive-phase output node of the differential output nodes of the first amplifier circuit;
• a second resistor having one end thereof coupled to a first negative-phase output node of the differential output nodes of the first amplifier circuit, and having a resistance value identical to that of the first resistor;
• a third resistor having one end thereof coupled to a second positive-phase output node of differential output nodes of the second amplifier circuit;
• a fourth resistor having one end thereof coupled to a second negative-phase output node of the differential output nodes of the second amplifier circuit, and having a resistance value identical to that of the third resistor;
• and
• a feedback circuit configured to amplify a positive-phase signal that is output from a positive-phase output node thereof coupled to another end of the first resistor and another end of the third resistor, and a negative-phase signal that is output from a negative-phase output node thereof coupled to another end of the second resistor and another end of the fourth resistor, and to feedback a feedback signal after amplification to the first amplifier circuit.