Variable resistive memory device including vertical channel pmos transistor and method of manufacturing the same

A method of manufacturing a semiconductor device, the method comprising:

• forming a first semiconductor layer on a semiconductor substrate, wherein the first semiconductor layer has a lattice constant smaller than that of the semiconductor substrate;
• patterning the first semiconductor layer and a portion of the semiconductor substrate to form a preliminary pillar;
• forming a second semiconductor layer having the same material as the semiconductor substrate, on an outer circumference of the preliminary pillar, to form a pillar;
• forming a drain in an upper portion of the pillar and a source in a lower portion of the pillar;
• and
• forming a gate to surround an outer circumference of the pillar.