Display device

A semiconductor device comprising:

• a pixel portion over a substrate;
• a protective circuit placed on an outside of the pixel portion;
• a scan line electrically connected to the protective circuit;
• and
• a common wiring electrically connected to the protective circuit, the protective circuit comprising a first transistor and a second transistor,
• wherein one of a source and a drain of the first transistor is electrically connected to the scan line, a gate of the first transistor, and one of a source and a drain of the second transistor,
• wherein the other of the source and the drain of the first transistor is electrically connected to the common wiring, a gate of the second transistor, and the other of the source and the drain of the second transistor,
• wherein each of the first transistor and the second transistor comprises an oxide semiconductor layer comprising a channel region, and
• wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

A semiconductor device comprising:

• a pixel portion over a substrate;
• a protective circuit placed on an outside of the pixel portion;
• a scan line electrically connected to the protective circuit;
• and
• a common wiring electrically connected to the protective circuit, the protective circuit comprising a first transistor, a second transistor, and a third transistor,
• wherein one of a source and a drain of the first transistor is electrically connected to the scan line and a gate of the first transistor,
• wherein one of a source and a drain of the second transistor is electrically connected to the common wiring and a gate of the second transistor,
• wherein one of a source and a drain of the third transistor is electrically connected to the scan line,
• wherein the other of the source and the drain of the third transistor is electrically connected to the common wiring,
• wherein a gate of the third transistor is electrically connected to the other of the source and the drain of the first transistor and the other of the source and the drain of the second transistor,
• wherein each of the first transistor, the second transistor, and the third transistor comprises an oxide semiconductor layer comprising a channel region, and
• wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

A semiconductor device comprising:

• a pixel portion over a substrate;
• a protective circuit placed on an outside of the pixel portion;
• a scan line electrically connected to the protective circuit;
• and
• a common wiring electrically connected to the protective circuit, the protective circuit comprising a first transistor, a second transistor, a third transistor, and a fourth transistor,
• wherein one of a source and a drain of the first transistor is electrically connected to the common wiring, a gate of the second transistor, and one of a source and a drain of the second transistor,
• wherein the other of the source and the drain of the first transistor is electrically connected to the scan line, a gate of the first transistor, and the other of the source and the drain of the second transistor,
• wherein one of a source and a drain of the third transistor is electrically connected to the common wiring, a gate of the fourth transistor, and one of a source and a drain of the fourth transistor,
• wherein the other of the source and the drain of the third transistor is electrically connected to the scan line, a gate of the third transistor, and the other of the source and the drain of the fourth transistor,
• wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor comprises an oxide semiconductor layer comprising a channel region, and
• wherein the oxide semiconductor layer comprises indium, gallium, and zinc.