US 2015/0311160 A1 · SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF

Abstract

A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a first dielectric layer surrounding a first transmission line and a magnetic layer surrounding the first dielectric layer. The magnetic layer increases the inductance of the transmission line. The semiconductor arrangement having the magnetic layer surrounding the first transmission line has increased impedance, which promotes current flow through the transmission line, without having increased resistance as compared to a semiconductor arrangement that does not have a magnetic layer. Increased resistance requires increased power, which results in a shorter semiconductor arrangement life span than the semiconductor arrangement without the increased resistance.

Claims21

Dependent claims

A semiconductor arrangement comprising:

a first transmission line surrounded by a first dielectric layer;
a magnetic layer surrounding the first dielectric layer, the magnetic layer dimensioned relative to at least one of the first transmission line or the first dielectric layer to increase inductance of the first transmission line by a factor greater than 1;
and
a second dielectric layer surrounding the magnetic layer.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

14/261,473Filed 25 Apr 2014

Published

29 Oct 2015

Term ends

Not estimatedThe source records don’t support an estimate.

Classification6 codes

H10W 44/20
Electrical arrangements for controlling or matching impedance: at high-frequency [HF] or radio frequency [RF]
H10W 20/056
Of conductive parts of the interconnections: by filling conductive material into holes, grooves or trenches
H10W 20/057
By filling conductive material into holes, grooves or trenches: by selectively depositing, e.g. by using selective CVD or plating
H10W 20/497
Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes: inductive…

Semiconductor arrangement and formation thereof

Life of this patent

Semiconductor arrangement and formation thereof

Life of this patent

Abstract

Claims21