Transistors with improved thermal conductivity

A field effect transistor (FET), comprising:

• a substrate;
• a box layer positioned above the substrate;
• a body above the box layer forming a channel region between a source and a drain;
• a gate positioned above the body;
• a high-k buffer layer between the body and the gate;
• and
• a spacer positioned beside the gate;
• wherein at least one of the substrate and the spacer is formed from Aluminum Nitride (AlN).

A field effect transistor (FET) assembly, comprising:

• a substrate;
• a source positioned over the substrate;
• a gate positioned over the substrate;
• a drain positioned over the substrate;
• a channel region between the source and drain;
• and
• a shallow trench isolation (STI) positioned proximate either the source or the drain, wherein the STI is formed from Beryllium Oxide (BeO).

A field effect transistor (FET), comprising:

• a substrate;
• a box layer positioned above the substrate;
• a body above the box layer forming a channel region between a source and a drain;
• a gate positioned above the body;
• a high-k buffer layer between the body and the gate;
• and
• a spacer positioned beside the gate;
• wherein at least one of the substrate, a portion of the box layer, and a portion of the high-k buffer layer is formed from a material having a thermal conductivity greater than 200 W/mK and a bandgap voltage greater than 2 eV.

A field effect transistor (FET), comprising:

• a substrate formed of either Beryllium Oxide (BeO) or Aluminum Nitride (AlN);
• a box layer positioned above the substrate;
• a body above the box layer forming a channel region between a source and a drain;
• a gate positioned above the body;
• a high-k buffer layer between the body and the gate;
• and
• a spacer positioned beside the gate.

A field effect transistor (FET), comprising:

• a substrate;
• a box layer positioned above the substrate, wherein at least a portion of the box layer comprises Beryllium Oxide (BeO);
• a body above the box layer forming a channel region between a source and a drain;
• a gate positioned above the body;
• a high-k buffer layer between the body and the gate;
• and
• a spacer positioned beside the gate.

A field effect transistor (FET), comprising:

• a substrate;
• a box layer positioned above the substrate;
• a body above the box layer forming a channel region between a source and a drain;
• a gate positioned above the body;
• a high-k buffer layer between the body and the gate, wherein at least a portion of the high-k buffer layer comprises either Beryllium Oxide (BeO) or Aluminum Nitride (AlN);
• and
• a spacer positioned beside the gate.

A field effect transistor (FET), comprising:

• a substrate;
• a box layer positioned above the substrate;
• a body above the box layer forming a channel region between a source and a drain;
• a gate positioned above the body;
• a high-k buffer layer between the body and the gate;
• and
• a spacer positioned beside the gate, wherein the spacer comprises Aluminum Nitride (AlN).