Assembly structure for connecting multiple dies into a system-in-package chip and the method thereof
AssigneesTaiwan Semiconductor Manufacturing Company, Ltd., Global Unichip Corporation
InventorsTsung Chuan Whang, Yi-Chieh Wang
Life of this patent
Estimating the term…
Abstract
A method for assembling multiple integrated circuit dies into a system-in-package chip is disclosed, the method comprising: providing a plurality of integrated circuit dies; disposing at least one redistribution layer on at least one of the plurality of integrated circuit dies for making wire connections among the plurality of integrated circuit dies without using a substrate underneath the plurality of integrated circuit dies; establishing wire connections among the plurality of integrated circuit dies and verifying the plurality of wire connections; and packaging the plurality of integrated circuit dies and the verified wire connections into a system-in-package chip.
Claims10
A method for assembling multiple integrated circuit dies into a system-in-package chip, the method comprising:
- (a) providing a plurality of integrated circuit dies;
- (b) disposing at least one redistribution layer on at least one of the plurality of integrated circuit dies for making wire connections among the plurality of integrated circuit dies without using a substrate underneath the plurality of integrated circuit dies;
- (c) establishing wire connections among the plurality of integrated circuit dies and verifying the plurality of wire connections;
- and
- (d) packaging the plurality of integrated circuit dies and the verified wire connections into a system-in-package chip.
Dependencies are inferred from the claim text.