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US 2015/0311079 A1Published application
Semiconductor integrated circuit manufacturing method
AssigneeKabushiki Kaisha Toshiba
InventorsTakayuki Ito, Kenichi Yoshino, Tomoya Sanuki, Hiroshi Ohno
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Abstract
According to embodiments, there is provided a semiconductor device, including: a first area including plural transistors formed therein; and a second area including plural dummy transistors formed therein, the second area surrounding the first area, wherein a pitch of the dummy transistors is equal to or less than a central wavelength of a light used to form the transistors.
Claims13
1-14. (canceled)
A semiconductor device manufacturing method, comprising:
- preparing semiconductor substrate on which a first area, a second area and an element isolation region are formed, each of the first area and the second area including plural transistors, the element isolation region dividing the first area and the second area therebetween;
- and
- irradiating the semiconductor substrate with a light to activate impurity of the transistors of the first and second areas in a condition in which a thermal diffusion length L of the semiconductor substrate due to a heat generated in the semiconductor substrate is less than a width of the element isolation region between the first and second areas.
Dependencies are inferred from the claim text.