Read-only memory
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuang Ting Chen, Ching-Wei Wu
Life of this patent
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Abstract
A configuration for a bit-1 read-only memory (ROM) cell is provided. The bit-1 ROM cell comprises a first circuit connected to a second circuit. The first circuit comprises a first transistor and the second circuit comprises a second transistor. The second circuit is configured to receive a YMUX signal. The second circuit is connected to a word-line bar. The second circuit is configured to maintain a disconnection or connection between the first transistor and the word-line bar based upon the YMUX signal. The first circuit is located on a different physical layer than the second circuit.
Claims20
A multi-layer bit-1 read-only memory (ROM) cell, comprising:
- a first circuit comprising a first transistor;
- and
- a second circuit comprising a second transistor, the second circuit configured to control a voltage in the first circuit and the second circuit located on a different physical layer than the first circuit.
A bit-1 read-only memory (ROM) cell, comprising:
- a first circuit comprising a first transistor;
- and
- a second circuit comprising a second transistor, the second circuit configured to control a voltage in the first circuit, the second circuit connected to a word-line bar and configured to receive a YMUX signal.
A method of controlling a voltage at a node of a bit-1 read-only memory (ROM) cell, comprising:
- using a second circuit to connect the node to a word-line bar when a YMUX signal has a voltage that is within a first voltage range;
- using the second circuit to maintain a disconnection between the node and the word-line bar when the YMUX signal has a voltage that is within a second voltage range;
- and
- controlling a voltage at the word-line bar.
Dependencies are inferred from the claim text.