Field Effect Transistor Constructions And Methods Of Programming Field Effect Transistors To One Of At Least Three Different Programmed States

A field effect transistor construction, comprising:

• a semiconductive channel core;
• a source/drain region at opposite ends of the channel core;
• a gate proximate a periphery of the channel core;
• and
• a ferroelectric gate insulator between the gate and the channel core, the ferroelectric gate insulator having local regions radially there-through of different radial thickness at different circumferential locations relative to the channel core periphery.

A field effect transistor construction, comprising:

• a semiconductive channel core;
• a source/drain region at opposite ends of the channel core;
• a gate proximate a periphery of the channel core;
• and
• a ferroelectric gate insulator between the gate and the channel core, the ferroelectric gate insulator being of constant radial thickness about the channel core, the ferroelectric gate insulator having local regions of different composition at different circumferential locations relative to the channel core periphery.

A field effect transistor construction, comprising:

• a semiconductive channel core;
• a source/drain region at opposite ends of the channel core;
• a gate construction proximate a periphery of the channel core, the gate construction comprising:
• outer conductive material proximate the channel core periphery;
• outer ferroelectric material proximate the channel core periphery radially inward of the outer conductive material;
• inner conductive material proximate the channel core periphery radially inward of the outer ferroelectric material;
• and
• inner dielectric radially between the inner conductive material and the channel core, the inner dielectric having local regions radially there-through of different radial thickness at different circumferential locations relative to the channel core periphery.

A field effect transistor construction, comprising:

• a semiconductive channel core;
• a source/drain region at opposite ends of the channel core;
• a gate construction proximate a periphery of the channel core, the gate construction comprising:
• outer conductive material proximate the channel core periphery;
• outer ferroelectric material proximate the channel core periphery radially inward of the outer conductive material, the outer ferroelectric material having local regions radially there-through of different radial thickness at different circumferential locations relative to the channel core periphery;
• inner conductive material proximate the channel core periphery radially inward of the outer ferroelectric material;
• and
• inner dielectric radially between the inner conductive material and the channel core.

A field effect transistor construction, comprising:

• a semiconductive channel core;
• a source/drain region at opposite ends of the channel core;
• a gate proximate a periphery of the channel core;
• and
• a gate insulator between the gate and the channel core, the gate insulator comprising at least two pairs of two diametrically opposed local regions extending radially through the gate insulator at different circumferential locations relative to the channel core periphery, the at least two pairs having different collective capacitance.

A field effect transistor construction, comprising:

• a semiconductive channel core having four radially outermost surfaces that are straight along at least a majority of their respective circumferential lengths;
• a source/drain region at opposite ends of the channel core;
• a gate proximate a periphery of the channel core;
• and
• a gate insulator between the gate and the channel core over each of the four surfaces, the gate insulator over a first two of diametrically opposed of the four surfaces being radially thinner than over a second two of diametrically opposed of the four surfaces.