A low-dropout regulator circuit with ultra-low power consumption, comprising an error-correction differential amplifier, an MOS transistor, a first voltage dividing resistor and a second voltage dividing resistor, a negative input end of the error-correction differential amplifier being connected to a bandgap reference voltage, a positive input end of the error-correction differential amplifier being grounded through the second voltage dividing resistor, an output end of the error-correction differential amplifier being connected to a gate of the MOS transistor, a source of the MOS transistor and a power input end of the error-correction differential amplifier being connected to a power input, respectively, a drain of the MOS transistor being connected to the positive input end of the error-correction differential amplifier through the first voltage dividing resistor, characterized in that,
- the low-dropout regulator circuit further comprises:
- a first threshold unit connected between the positive input end of the error-correction differential amplifier and the first voltage dividing resistor, the first threshold unit being configured to reduce a difference in voltage from the positive input end of the error-correction differential amplifier to a voltage output end;
- and
- a second threshold unit between the positive input end of the error-correction differential amplifier and the second voltage dividing resistor, the second threshold unit being configured to reduce a difference in voltage from the positive input end of the error-correction differential amplifier to a GND end.