Electrical and optical memory access

A system comprising:

• a plurality of processors;
• a data memory (BDM) dedicated to each of the plurality of processors;
• and
• an optical circuit switch (OCS);
• an optical memory link and an electrical memory link provided between each of the plurality of processors and the BDM;
• the optical circuit switch (OCS) operably coupled to the optical memory link;
• each of the plurality of processors has an OCS control line provided between the processor and the OCS;
• each of the plurality of processors configured to issue a command to a BDM other than the BDM dedicated to the processor through the electrical memory link and perform a process according to the command through the electrical memory link;
• each of the plurality of processors configured to issue a routing command to the OCS through the OCS control line command while the processor is performing the process;
• and
• wherein one of the processors or a BDM controller is configured to switch from performing the process through the electrical memory link to performing a process through the optical memory link continuously without an interruption between the successive processes in response to the OCS establishing a routing of the optical memory link from the processor to the BDM in response to the routing command.

A system comprising:

• a first processor;
• a data memory (BDM) dedicated to a first processor;
• an optical circuit switch (OCS);
• an optical memory link and an electrical memory link provided between a second processor and the BDM;
• an OCS control line provided between the second processor and the OCS;
• the second processor configured to issue a command to the BDM perform a process according to the command through the electrical memory link;
• the second processor configured to issue a routing command to the OCS through the OCS control line command while the processor is performing the process;
• and
• wherein the second processor is configured to switch from performing the process through the electrical memory link to performing a process through the optical memory link continuously without an interruption between the successive processes in response to the OCS establishing a routing of the optical memory link from the second processor to the BDM in response to the routing command.