Selective cache way-group power down
AssigneeApple Inc.
InventorsMahnaz Sadoughi-Yarandi, Perumal R. Subramonium, Brian P. Lilly, Hari S. Kannan
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Abstract
A method and apparatus for selectively powering down a portion of a cache memory includes determining a power down condition dependent upon a number of accesses to the cache memory. In response to the detection of the power down condition, selecting a group of cache ways included in the cache memory dependent upon a number of cache lines in each cache way that are also included in another cache memory. The method further includes locking and flushing the selected group of cache ways, and then activating a low power mode for the selected group of cache ways.
Claims20
An apparatus, comprising:
- a cache memory, wherein the cache memory includes a plurality of groups, wherein each group of the plurality of groups includes a plurality of cache ways, and wherein each cache way of the plurality of cache ways includes a plurality of cache lines;
- circuitry coupled to the cache memory, wherein the circuitry is configured to:
- detect a power down condition for the cache memory dependent upon a number of accesses to the cache memory;
- select, in response to the detection of the power down condition, one of the plurality of groups dependent upon a number of cache lines in each cache way of the plurality of cache ways in each group of the plurality of groups that are also included in another cache memory;
- and
- lock the selected one of the plurality of groups;
- and
- a flush engine configured to flush each cache line of each cache way of the plurality of cache ways of the selected group;
- wherein the circuitry is further configured to activate a power down mode for the selected one of the plurality of groups responsive to a determination that the flush of each cache line of each cache way of the plurality of cache ways of the selected one of the plurality of groups has completed.
A method for operating a cache memory, wherein the cache memory includes a plurality of groups, wherein each group of the plurality of groups includes a plurality of cache ways, and wherein each cache way of the plurality of cache ways includes a plurality of cache lines, the method comprising:
- detecting a power down condition for the cache memory dependent upon a number of accesses to the cache memory;
- selecting, in response to the detection of the power down condition, one of the plurality of groups dependent upon a number of cache lines in each cache way of the plurality of cache ways in each group of the plurality of groups that are also included in another cache memory;
- locking the selected one of the plurality of groups;
- flushing the selected one of the plurality of groups;
- and
- activating a power down mode for the selected set of cache ways responsive to a determination that the flushing of the selected one of the plurality of groups has completed.
A system, comprising:
- a processor;
- a cache memory coupled to the processor, wherein the cache memory includes a plurality of groups, wherein each group of the plurality of groups includes a plurality of cache ways, wherein each cache way includes a plurality of cache lines;
- and
- circuitry coupled to the cache memory, wherein the circuitry is configured to:
- detect a power down condition for the cache memory dependent upon a number of accesses to the cache memory;
- select, in response to the detection of the power down condition, one of the plurality of groups dependent upon a number of cache lines in each cache way in the plurality of cache ways in each group of the plurality of groups that are also included in another cache memory;
- lock the selected one of the plurality of groups;
- flush the selected one of the plurality of groups;
- and
- activate a power down mode for the selected one of the plurality of groups responsive to a determination that the flush of the selected one of the plurality of groups has completed.
Dependencies are inferred from the claim text.