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US 2015/0309865 A1Published application
Memory control unit and data storage device including the same
AssigneeSK hynix Inc.
InventorsJae Woo KIM, Joong Hyun AN, Kwang Hyun KIM
Life of this patent
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Abstract
A data storage device includes a storage memory device; a signal generation block suitable for generating control signals to be provided to the storage memory device; and an error correction code (ECC) block suitable for ECC-encoding data to be stored in the storage memory device, wherein the ECC block operates before the signal generation block.
Claims18
A data storage device comprising:
- a storage memory device;
- a signal generation block suitable for generating control signals to be provided to the storage memory device;
- and
- an error correction code (ECC) block suitable for ECC-encoding data to be stored in the storage memory device,
- wherein the ECC block operates before the signal generation block operates.
2 more elements
The data storage device according to claim wherein the descriptor processing block comprises:
- a direct memory access (DMA) block suitable for reading the descriptor from a working memory;
- a descriptor fetch block suitable for controlling the DMA block to read the descriptor;
- an instruction fetch block suitable for fetching the instruction set based on the descriptor;
- and
- an instruction push block suitable for providing the instruction set and the descriptor parameter to the signal generation block, and providing the encoding information to the ECC block.
2 more elements
A memory control unit comprising:
- a direct memory access (DMA) block suitable for reading data from a working memory;
- an error correction code (ECC) block suitable for ECC-encoding data provided from the DMA block;
- a signal generation block suitable for generating a data signal to be provided to a memory device based on the data encoded by the ECC block, and generating a control signal to be provided to the memory device;
- and
- an instruction push block suitable for sequentially instructing the DMA block to read the data, the ECC block to ECC-encode the data, and the signal generation block to generate the data signal, and generate the control signal.
2 more elements
A control apparatus for controlling a storage memory device, comprising:
- an instruction unit suitable for generating an instruction, an encoding information, and a data request;
- an ECC unit suitable for ECC-encoding a data based on the encoding information;
- a signal generation unit suitable for generating a control signal for controlling the storage memory device, and a data signal for storing the ECC-encoded data in the storage memory device in response to the instruction;
- and
- a buffer unit suitable for buffering the data provided from an external, and providing the data buffered therein to the ECC unit based on the data request,
- wherein the instruction unit provides the instruction, the encoding information, and the data request so that the ECC unit completes the ECC-encoding on or before the generation of the control signal.
3 more elements
Dependencies are inferred from the claim text.